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CODES
2010
IEEE
13 years 3 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
CODES
2004
IEEE
13 years 9 months ago
Design and programming of embedded multiprocessors: an interface-centric approach
We present design technology for the structured design and programming of embedded multi-processor systems. It comprises a task-level interface that can be used both for developin...
Pieter van der Wolf, Erwin A. de Kock, Tomas Henri...
DAC
2006
ACM
14 years 6 months ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
CODES
2007
IEEE
13 years 11 months ago
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
Mark Thompson, Hristo Nikolov, Todor Stefanov, And...
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
14 years 1 days ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel