32 search results - page 1 / 7 » Modeling Multiprocessor Cache Protocol Impact on MPI Perform... |
AINA
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper presents a modeling method particularly suited to analyze interactions between Message Passing Interface MPI library execution and distributed cache coherence protocol....
IPPS
1998
IEEE
13 years 8 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
HPCA
2005
IEEE
14 years 4 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
IEEEPACT
2009
IEEE
13 years 2 months ago
2009
IEEE
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
IJHPCN
2006
13 years 4 months ago
2006
As symmetric multiprocessors become commonplace, the interconnection networks and the communication system software in clusters of multiprocessors become critical to achieving high...