71 search results - page 1 / 15 » Modeling and Simulating Memory Hierarchies in a Platform-Bas... |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
SAC
2006
ACM
13 years 10 months ago
2006
ACM
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Enhancing productivity for designing complex embedded systems requires system level design methodology and language support for capturing complex design in high level models. For ...
APCSAC
2004
IEEE
13 years 8 months ago
2004
IEEE
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory. This paper is a first look at the value of RAMpage to ...
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...