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» Modeling shared variables in VHDL
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EURODAC
1994
IEEE
130views VHDL» more  EURODAC 1994»
13 years 8 months ago
Modeling shared variables in VHDL
A set of concurrent processes communicating through shared variables is an often used model for hardware systems. This paper presents three modeling techniques for representing su...
Jan Madsen, Jens P. Brage
ISVC
2009
Springer
13 years 11 months ago
Speech-Driven Facial Animation Using a Shared Gaussian Process Latent Variable Model
Abstract. In this work, synthesis of facial animation is done by modelling the mapping between facial motion and speech using the shared Gaussian process latent variable model. Bot...
Salil Deena, Aphrodite Galata
SEW
2006
IEEE
13 years 10 months ago
Integrating Probability with Time and Shared-Variable Concurrency
Complex software systems typically involve features like time, concurrency and probability, where probabilistic computations play an increasing role. It is challenging to formaliz...
Huibiao Zhu, Shengchao Qin, Jifeng He, Jonathan P....
LICS
1993
IEEE
13 years 8 months ago
Full Abstraction for a Shared Variable Parallel Language
traction for a Shared Variable Parallel Language Stephen Brookes∗ School of Computer Science Carnegie Mellon University Pittsburgh, Pa 15213 We give a new denotational semantics...
Stephen D. Brookes
DAC
1997
ACM
13 years 8 months ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider