8 search results - page 2 / 2 » Modeling the Overshooting Effect for CMOS Inverter Delay Ana... |
DSN
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
– The quest for technologies with superior device characteristics has showcased Carbon Nanotube Field Effect Transistors (CNFETs) into limelight. Among the several design aspects...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
— The inductance and coupling effects in interconnects and non-linear receiver loads has resulted in complex input signals and output loads for gates in the modern deep submicron...