Sciweavers

528 search results - page 1 / 106
» Modularizing error recovery
Sort
View
ICSM
2009
IEEE
13 years 11 months ago
Modularizing error recovery
Error recovery is an integral concern in compilers. Improving error recovery requires comprehension of a large and complex code base, in order to locate the places which raise err...
Jeeva Paudel, Christopher Dutchyn
DSN
2008
IEEE
13 years 11 months ago
A characterization of instruction-level error derating and its implications for error detection
In this work, we characterize a significant source of software derating that we call instruction-level derating. Instruction-level derating encompasses the mechanisms by which co...
Jeffrey J. Cook, Craig B. Zilles
ASPLOS
2004
ACM
13 years 10 months ago
Fingerprinting: bounding soft-error detection latency and bandwidth
Recent studies have suggested that the soft-error rate in microprocessor logic will become a reliability concern by 2010. This paper proposes an efficient error detection techniqu...
Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Baba...
DFT
2007
IEEE
152views VLSI» more  DFT 2007»
13 years 8 months ago
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...
Cristiana Bolchini, Antonio Miele, Marco D. Santam...
ICTAI
2000
IEEE
13 years 9 months ago
The n-dimensional projective approach as a tool for spatial reasoning
In this paper, we describe the n-dimensional projective approach as a hierarchical and modular architecture with a processing mechanism that underlies both spatial backtracking an...
Jorge Pais, Carlos A. Pinto-Ferreira