15 search results - page 3 / 3 » Multilevel global placement with retiming |
ISPD
2006
ACM
13 years 11 months ago
2006
ACM
APlace is a high quality, scalable analytical placer. This paper describes our recent efforts to improve APlace for speed and scalability. We explore various wirelength and densi...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Post-silicon validation has recently drawn designers' attention due to its increasing impacts on the VLSI design cycle and cost. One key feature of the post-silicon validatio...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
— The recent popularity of 3D IC technology stems from its enhanced performance capabilities and reduced wirelength. However, wire congestion and thermal issues are exacerbated d...
ICCAD
2006
IEEE
13 years 11 months ago
2006
IEEE
In addition to wirelength, modern placers need to consider various constraints such as preplaced blocks and density. We propose a high-quality analytical placement algorithm consi...
ASPDAC
2000
ACM
13 years 9 months ago
2000
ACM
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...