15 search results - page 2 / 3 » Multiplexed redundant execution: A technique for efficient f... |
ISCA
2003
IEEE
13 years 11 months ago
2003
IEEE
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
TPDS
2010
13 years 13 days ago
2010
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...
ISCAPDCS
2001
13 years 7 months ago
2001
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
DSN
2011
IEEE
12 years 5 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
ISCA
2005
IEEE
13 years 11 months ago
2005
IEEE
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...