36 search results - page 4 / 8 » New Performance-Driven FPGA Routing Algorithms |
IPPS
2006
IEEE
14 years 2 days ago
2006
IEEE
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
FPGA
1999
ACM
13 years 10 months ago
1999
ACM
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
FPL
2006
Springer
13 years 9 months ago
2006
Springer
We introduce a new congestion driven placement algorithm for FPGAs in which the overlappingeffect of boundingboxes is taken into consideration. Experimental results show that comp...
FPGA
1998
ACM
13 years 10 months ago
1998
ACM
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
FPGA
2000
ACM
13 years 9 months ago
2000
ACM
A method for evaluating and constructing sparse crossbars which are both area efficient and highly routable is presented. The evaluation method uses a network flow algorithm to ac...