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DATE
2005
IEEE
102views Hardware» more  DATE 2005»
13 years 10 months ago
New Schemes for Self-Testing RAM
This paper gives an overview of a new technique, named pseudo-ring testing (PRT). PRT can be applied for testing wide type of random access memories (RAM): bitor word-oriented and...
Ghenadie Bodean, D. Bodean, A. Labunetz
IACR
2011
110views more  IACR 2011»
12 years 4 months ago
On the (In)security of Hash-based Oblivious RAM and a New Balancing Scheme
With the gaining popularity of remote storage (e.g. in the Cloud), we consider the setting where a small, protected local machine wishes to access data on a large, untrusted remot...
Eyal Kushilevitz, Steve Lu, Rafail Ostrovsky
VTS
2005
IEEE
96views Hardware» more  VTS 2005»
13 years 10 months ago
Implementing a Scheme for External Deterministic Self-Test
A new method for test resource partitioning is introduced which keeps the design-for-test logic independent of the test set and moves the test pattern dependent information to an ...
Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valent...
VTS
1995
IEEE
99views Hardware» more  VTS 1995»
13 years 8 months ago
Arithmetic built-in self test for high-level synthesis
In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to...
Nilanjan Mukherjee, H. Kassab, Janusz Rajski, Jerz...
DATE
1999
IEEE
80views Hardware» more  DATE 1999»
13 years 9 months ago
Symmetric Transparent BIST for RAMs
The paper introduces the new concept of symmetric transparent BIST for RAMs. This concept allows to skip the signature prediction phase of conventional transparent BIST approaches...
Sybille Hellebrand, Hans-Joachim Wunderlich, Vyach...