69 search results - page 14 / 14 » Noise margin analysis for dynamic logic circuits |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper introduces a method and tool-support for the automatic analysis and verification of hybrid and embedded control systems, whose continuous dynamics are often modelled u...
ICCAD
2007
IEEE
13 years 11 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
TVLSI
2010
12 years 11 months ago
2010
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
ISCA
2000
IEEE
13 years 9 months ago
2000
IEEE
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...