Sciweavers

28 search results - page 2 / 6
» Non-gaussian statistical interconnect timing analysis
Sort
View
DAC
2006
ACM
14 years 6 months ago
Statistical timing analysis with correlated non-gaussian parameters using independent component analysis
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
Jaskirat Singh, Sachin S. Sapatnekar
ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
DAC
2005
ACM
13 years 7 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...
DAC
2004
ACM
14 years 6 months ago
Fast statistical timing analysis handling arbitrary delay correlations
CT An efficient statistical timing analysis algorithm that can handle arbitrary (spatial and structural) causes of delay correlation is described. The algorithm derives the entire ...
Michael Orshansky, Arnab Bandyopadhyay
DAC
2004
ACM
14 years 6 months ago
Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining
With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen