26 search results - page 4 / 6 » Non-local Instruction Scheduling with Limited Code Growth |
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
CODES
2009
IEEE
13 years 9 months ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
RTSS
1999
IEEE
13 years 10 months ago
1999
IEEE
Previous timing analysis methods have assumed that the worst-case instruction execution time necessarily corresponds to the worst-case behavior. We show that this assumption is wr...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
IPPS
2010
IEEE
13 years 3 months ago
2010
IEEE
In this paper we present the venture of porting two different algorithms for solving the two-dimensional advection PDE on the CBE platform, an in-place and an outof-place one, and ...