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» Novel CNTFET-based Reconfigurable Logic Gate Design
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DAC
2009
ACM
14 years 7 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DATE
2007
IEEE
138views Hardware» more  DATE 2007»
14 years 18 days ago
Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling
—Increasing power density causes die overheating due to limited cooling capacity of the package. Conventional thermal management techniques e.g. logic shutdown, clock gating, fre...
Swaroop Ghosh, Swarup Bhunia, Kaushik Roy
FC
2000
Springer
106views Cryptology» more  FC 2000»
13 years 10 months ago
Capability-Based Financial Instruments
Every novel cooperative arrangement of mutually suspicious parties interacting electronically -- every smart contract -- effectively requires a new cryptographic protocol. However,...
Mark S. Miller, Chip Morningstar, Bill Frantz
ICCAD
2007
IEEE
102views Hardware» more  ICCAD 2007»
14 years 3 months ago
Scalable exploration of functional dependency by interpolation and incremental SAT solving
Functional dependency is concerned with rewriting a Boolean function f as a function h over a set of base functions {g1, …, gn}, i.e. f = h(g1, …, gn). It plays an important r...
Chih-Chun Lee, Jie-Hong Roland Jiang, Chung-Yang H...
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
13 years 10 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck