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VTS
2003
IEEE
131views Hardware» more  VTS 2003»
13 years 11 months ago
Efficient Implication - Based Untestable Bridge Fault Identifier
: This paper presents a novel, low cost technique based on implications to identify untestable bridging faults in sequential circuits. Sequential symbolic simulation [1] is first p...
Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, ...
FORTE
1998
13 years 7 months ago
Hardware synthesis from protocol specifications in LOTOS
: In this paper, we propose a technique for hardware implementation of protocol specifications in LOTOS. For the purpose, we define a new model called synchronous EFSMs consisting ...
Keiichi Yasumoto, Akira Kitajima, Teruo Higashino,...
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
13 years 10 months ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee