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» On Programmable Memory Built-In Self Test Architectures
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VTS
1995
IEEE
99views Hardware» more  VTS 1995»
13 years 9 months ago
Arithmetic built-in self test for high-level synthesis
In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to...
Nilanjan Mukherjee, H. Kassab, Janusz Rajski, Jerz...
ITC
1997
IEEE
121views Hardware» more  ITC 1997»
13 years 10 months ago
BIST-Based Diagnostics of FPGA Logic Blocks
: Accurate diagnosis is an essential requirement in many testing environments, since it is the basis for any repair or replacement strategy used for chip or system fault-tolerance....
Charles E. Stroud, Eric Lee, Miron Abramovici
ITC
2002
IEEE
143views Hardware» more  ITC 2002»
13 years 10 months ago
BIST-Based Diagnosis of FPGA Interconnect
: We present a Built-In Self-Test (BIST)-based diagnostic approach for the programmable interconnect resources in Field Programmable Gate Arrays (FPGAs) that can be used for either...
Charles E. Stroud, Jeremy Nall, Matthew Lashinsky,...
MTDT
2000
IEEE
137views Hardware» more  MTDT 2000»
13 years 10 months ago
Diagnostic Testing of Embedded Memories Based on Output Tracing
A new approach to diagnostic testing of embedded memories is presented which enables the design of tests that provide complete detection and distinguishing of all faults in a give...
Dirk Niggemeyer, Elizabeth M. Rudnick, Michael Red...
CSREAESA
2009
13 years 6 months ago
Embedded Processor Based Fault Injection and SEU Emulation for FPGAs
Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip...
Bradley F. Dutton, Mustafa Ali, Charles E. Stroud,...