19 search results - page 2 / 4 » On Reusing the Results of Pre-Executed Instructions in a Run... |
MICRO
1999
IEEE
13 years 10 months ago
1999
IEEE
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
EUROPAR
2001
Springer
13 years 10 months ago
2001
Springer
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
ICPP
1999
IEEE
13 years 10 months ago
1999
IEEE
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) are frequently repeated during the execution of a program, and in many cases, th...
IPPS
2005
IEEE
13 years 11 months ago
2005
IEEE
Current processors exploit out-of-order execution and branch prediction to improve instruction level parallelism. When a branch prediction is wrong, processors flush the pipeline ...
MICRO
2000
IEEE
13 years 9 months ago
2000
IEEE
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...