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» On Structural vs. Functional Testing for Delay Faults
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ISQED
2003
IEEE
147views Hardware» more  ISQED 2003»
9 years 5 months ago
On Structural vs. Functional Testing for Delay Faults
A structurally testable delay fault might become untestable in the functional mode of the circuit due to logic or timing constraints or both. Experimental data suggests that there...
Angela Krstic, Jing-Jia Liou, Kwang-Ting Cheng, Li...
DATE
2006
IEEE
78views Hardware» more  DATE 2006»
9 years 6 months ago
Functional constraints vs. test compression in scan-based delay testing
We present an approach to prevent overtesting in scan-based delay test. The test data is transformed with respect to functional constraints while simultaneously keeping as many po...
Ilia Polian, Hideo Fujiwara
ICCAD
2006
IEEE
126views Hardware» more  ICCAD 2006»
9 years 8 months ago
Exploring linear structures of critical path delay faults to reduce test efforts
It has been shown that the delay of a target path can be composed linearly of other path delays. If the later paths are robustly testable (with known delay values), the target pat...
Shun-Yen Lu, Pei-Ying Hsieh, Jing-Jia Liou
DSD
2006
IEEE
126views Hardware» more  DSD 2006»
9 years 6 months ago
Off-Line Testing of Delay Faults in NoC Interconnects
Testing of high density SoCs operating at high clock speeds is an important but difficult problem. Many faults, like delay faults, in such sub-micron chips may only appear when th...
Tomas Bengtsson, Artur Jutman, Shashi Kumar, Raimu...
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
9 years 1 months ago
Constraint extraction for pseudo-functional scan-based delay testing
Recent research results have shown that the traditional structural testing for delay and crosstalk faults may result in over-testing due to the non-trivial number of such faults t...
Yung-Chieh Lin, Feng Lu, Kai Yang, Kwang-Ting Chen...
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