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» On Testing the Path Delay Faults of a Microprocessor Using i...
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VTS
2000
IEEE
167views Hardware» more  VTS 2000»
13 years 10 months ago
Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
14 years 5 days ago
Fast bit permutation unit for media enhanced microprocessors
— Bit and subword permutations are useful in many multimedia and cryptographic applications. New shift and permute instructions have been added to the instruction set of general-...
Giorgos Dimitrakopoulos, Christos Mavrokefalidis, ...
DAC
2002
ACM
14 years 7 months ago
Software-based diagnosis for processors
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed test of high-speed microprocessors using low-cost testers. We explore the fault diagnos...
Li Chen, Sujit Dey
DAC
2006
ACM
13 years 8 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
13 years 10 months ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...