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» On Using Efficient Test Sequences for BIST
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CORR
2010
Springer
152views Education» more  CORR 2010»
13 years 2 months ago
Evolutionary Approach to Test Generation for Functional BIST
In the paper, an evolutionary approach to test generation for functional BIST is considered. The aim of the proposed scheme is to minimize the test data volume by allowing the dev...
Y. A. Skobtsov, D. E. Ivanov, V. Y. Skobtsov, Raim...
ASPDAC
2000
ACM
96views Hardware» more  ASPDAC 2000»
13 years 9 months ago
A programmable built-in self-test core for embedded memories
Testing embedded memories is becoming an industry-wide concern with the advent of deep-submicron technology and system-on-chip applications. We present a prototype chip for a progr...
Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu
ICCAD
2000
IEEE
77views Hardware» more  ICCAD 2000»
13 years 10 months ago
Improving the Proportion of At-Speed Tests in Scan BIST
A method to select the lengths of functional sequences in a BIST scheme for scan designs is proposed in this paper. A functional sequence is a sequence of primary input vectors ap...
Yu Huang, Irith Pomeranz, Sudhakar M. Reddy, Janus...
VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
13 years 11 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
ATS
1998
IEEE
91views Hardware» more  ATS 1998»
13 years 9 months ago
Special ATPG to Correlate Test Patterns for Low-Overhead Mixed-Mode BIST
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
Madhavi Karkala, Nur A. Touba, Hans-Joachim Wunder...