A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median de...
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
JunBok You, Yang Xu, Hosuk Han, Kenneth S. Stevens
Recently, a quantitative wiring diagram for the local neuronal network of cat visual cortex was described [T. Binzegger, R.J. Douglas, K.A.C. Martin, A quantitative map of the cir...
Jens Kremkow, Arvind Kumar, Stefan Rotter, Ad Aert...
abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform ...
In this work, we propose a distributed control strategy for perimeter patrolling and target tracking in a multi-camera videosurveillance system with communication, resources and sp...