20 search results - page 2 / 4 » Optimal Clock Period Clustering for Sequential Circuits with... |
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper investigates retiming and clock skew scheduling for improving the tolerance of synchronous circuits to delay variations. It is shown that when both long and short paths...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper, we study the problem of retiming of sequential circuits with both interconnect and gate delay. Most retiming algorithms have assumed ideal conditions for the non-lo...
ISPD
2004
ACM
13 years 10 months ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
DAC
1996
ACM
13 years 9 months ago
1996
ACM