261 search results - page 1 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...
VTS
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
VTS
1998
IEEE
13 years 9 months ago
1998
IEEE
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
—A Built-In Self-Test (BIST) approach for functionality measurements, including noise figure (NF), linearity and frequency response of analog circuitry in mixedsignal systems, is...