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ISCAS
2007
IEEE
126views Hardware» more  ISCAS 2007»
14 years 10 days ago
Optimal Body Biasing for Minimum Leakage Power in Standby Mode
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...
Kyung Ki Kim, Yong-Bin Kim
ASPDAC
2009
ACM
159views Hardware» more  ASPDAC 2009»
13 years 10 months ago
Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors
— In three-dimensional (3D) chips, the amount of supply current per package pin is significantly more than in two-dimensional (2D) designs. Therefore, the power supply noise pro...
Pingqiang Zhou, Karthikk Sridharan, Sachin S. Sapa...
ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
13 years 6 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...
SBCCI
2005
ACM
111views VLSI» more  SBCCI 2005»
13 years 11 months ago
Total leakage power optimization with improved mixed gates
Gate oxide tunneling current Igate and sub-threshold current Isub dominate the leakage of designs. The latter depends on threshold voltage Vth while Igate vary with the thickness ...
Frank Sill, Frank Grassert, Dirk Timmermann
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 17 days ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...