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» Optimal non-uniform wire-sizing under the Elmore delay model
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DATE
2007
IEEE
96views Hardware» more  DATE 2007»
14 years 10 days ago
Self-heating-aware optimal wire sizing under Elmore delay model
Global interconnect temperature keeps rising in the current and future technologies due to self-heating and the adiabatic property of top metal layers. The thermal e ects impact a...
Min Ni, Seda Ogrenci Memik
DAC
1994
ACM
13 years 10 months ago
RC Interconnect Optimization Under the Elmore Delay Model
An e cient solution to the wire sizing problem WSP usingthe Elmoredelaymodelisproposed. Two formulations of the problem are put forth: in the rst, the minimum interconnect delay i...
Sachin S. Sapatnekar
ASPDAC
1998
ACM
79views Hardware» more  ASPDAC 1998»
13 years 10 months ago
Simultaneous Wire Sizing and Wire Spacing in Post-Layout Performance Optimization
- In this paper, we study the wire sizing and wire spacing problem for post-layout performance optimization under Elmore delay model. Both ground capacitance and coupled capacitanc...
Jiang-An He, Hideaki Kobayashi
VLSID
1999
IEEE
93views VLSI» more  VLSID 1999»
13 years 10 months ago
Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
Noel Menezes, Chung-Ping Chen
ICCAD
1994
IEEE
61views Hardware» more  ICCAD 1994»
13 years 10 months ago
Simultaneous driver and wire sizing for performance and power optimization
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
Jason Cong, Cheng-Kok Koh