155 search results - page 2 / 31 » Optimizations for a Highly Cost-Efficient Programmable Logic... |
FPL
2006
Springer
13 years 8 months ago
2006
Springer
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
DSN
2007
IEEE
13 years 11 months ago
2007
IEEE
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
VLSISP
2008
13 years 5 months ago
2008
Many different video processor architectures exist. Its architecture gives a processor strength for a particular application. Hardwired logic yields the best performance/cost, but ...
FPL
2003
Springer
13 years 10 months ago
2003
Springer
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...