88 search results - page 2 / 18 » Optimized Generation of Data-Path from C Codes for FPGAs |
TACO
2008
13 years 5 months ago
2008
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
DATE
2009
IEEE
14 years 8 days ago
2009
IEEE
Abstract—The demand for embedded computing power is continuously increasing and FPGAs are becoming very interesting computing platforms, as they provide huge amounts of customiza...
FPL
2006
Springer
13 years 9 months ago
2006
Springer
Pre-designed IP cores for FPGAs represent a huge intellectual and financial wealth that must be leveraged by any high-level tool targeting reconfigurable platforms. In this paper ...
ICCS
2009
Springer
14 years 2 days ago
2009
Springer
The development of optimized codes is time-consuming and requires extensive architecture, compiler, and language expertise, therefore, computational scientists are often forced to ...
CASES
2008
ACM
13 years 7 months ago
2008
ACM
In this paper, we introduce Optimus: an optimizing synthesis compiler for streaming applications. Optimus compiles programs written in a high level streaming language to either so...