8 search results - page 1 / 2 » Optimizing sequential verification by retiming transformatio... |
DAC
2000
ACM
13 years 9 months ago
2000
ACM
ICCAD
1998
IEEE
13 years 9 months ago
1998
IEEE
Retiming and resynthesis transformations can be used for optimizing the area, power, and delay of sequential circuits. Even though this technique has been known for more than a de...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
Retiming is a transformation that optimizes a sequential circuit by relocating the registers. When the circuit has an initial state, one must compute an equivalent initial state f...
ICCAD
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— Retiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, differe...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...