Sciweavers

340 search results - page 2 / 68
» Order reduction of large scale DAE models
Sort
View
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
13 years 10 months ago
Variation-aware interconnect extraction using statistical moment preserving model order reduction
—1 In this paper we present a stochastic model order reduction technique for interconnect extraction in the presence of process variabilities, i.e. variation-aware extraction. It...
Tarek A. El-Moselhy, Luca Daniel
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
JCB
2007
198views more  JCB 2007»
13 years 4 months ago
Bayesian Hierarchical Model for Large-Scale Covariance Matrix Estimation
Many bioinformatics problems can implicitly depend on estimating large-scale covariance matrix. The traditional approaches tend to give rise to high variance and low accuracy esti...
Dongxiao Zhu, Alfred O. Hero III
ASPDAC
1999
ACM
144views Hardware» more  ASPDAC 1999»
13 years 9 months ago
Model Order Reduction of Large Circuits Using Balanced Truncation
A method is introduced for model order reduction of large circuits extracted from layout. The algorithm, which is based on balanced realization, can be used for reducing the order ...
Payam Rabiei, Massoud Pedram
ICCAD
2007
IEEE
137views Hardware» more  ICCAD 2007»
14 years 1 months ago
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jia...