—1 In this paper we present a stochastic model order reduction technique for interconnect extraction in the presence of process variabilities, i.e. variation-aware extraction. It...
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Many bioinformatics problems can implicitly depend on estimating large-scale covariance matrix. The traditional approaches tend to give rise to high variance and low accuracy esti...
A method is introduced for model order reduction of large circuits extracted from layout. The algorithm, which is based on balanced realization, can be used for reducing the order ...
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jia...