833 search results - page 2 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
RECONFIG
2008
IEEE
13 years 11 months ago
2008
IEEE
MVA
1994
13 years 6 months ago
1994
In our work we improve the EPPI programming environment, which was made in the University of Castilla - la Mancha one year ago. EPPI is a tool for simulating parallel algorithms t...
DAC
2000
ACM
13 years 9 months ago
2000
ACM
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
PROCEDIA
2010
13 years 1 days ago
2010
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...