Sciweavers

63 search results - page 4 / 13
» Parallel algorithms for inductance extraction of VLSI circui...
Sort
View
DAC
2009
ACM
13 years 10 months ago
GPU-based parallelization for fast circuit optimization
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...
Yifang Liu, Jiang Hu
GLVLSI
2006
IEEE
101views VLSI» more  GLVLSI 2006»
13 years 11 months ago
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
VLSID
2007
IEEE
153views VLSI» more  VLSID 2007»
14 years 6 months ago
Extracting Logic Circuit Structure from Conjunctive Normal Form Descriptions
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
Zhaohui Fu, Sharad Malik
ISPD
2000
ACM
139views Hardware» more  ISPD 2000»
13 years 10 months ago
Critical area computation for missing material defects in VLSI circuits
We address the problem of computing critical area for missing material defects in a circuit layout. The extraction of critical area is the main computational problem in VLSI yield...
Evanthia Papadopoulou
TVLSI
2002
95views more  TVLSI 2002»
13 years 5 months ago
Efficient inductance extraction using circuit-aware techniques
We propose two practical approaches for on-chip inductance extraction to obtain a highly sparsified and accurate inverse inductance matrix K. Both approaches differ from previous ...
Haitian Hu, Sachin S. Sapatnekar