33 search results - page 7 / 7 » Parameter variations and impact on circuits and microarchite... |
GLVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—This work proposes reliability aware through silicon via (TSV) planning for the 3D stacked silicon integrated circuits (ICs). The 3D power distribution network is modele...