Sciweavers

479 search results - page 2 / 96
» Partitioning of Functional Models of Synchronous Digital Sys...
Sort
View
ASPDAC
2005
ACM
101views Hardware» more  ASPDAC 2005»
13 years 7 months ago
A clustering technique to optimize hardware/software synchronization
— In this paper we present a scheme for reducing the amount of synchronization overhead needed between components, after HW/SW partitioning, to preserve the original control flo...
Junyu Peng, Samar Abdi, Daniel Gajski
ACSD
2009
IEEE
92views Hardware» more  ACSD 2009»
14 years 19 days ago
Desynchronizing Synchronous Programs by Modes
The synchronous programming paradigm simplifies the specification and verification of reactive systems. However, synchronous programs must be often implemented on architectures...
Jens Brandt, Mike Gemunde, Klaus Schneider
DAC
2011
ACM
12 years 5 months ago
Synchronous sequential computation with molecular reactions
Just as electronic systems implement computation in terms of voltage (energy per unit charge), molecular systems compute in terms of chemical concentrations (molecules per unit vo...
Hua Jiang, Marc D. Riedel, Keshab K. Parhi
CAV
1990
Springer
114views Hardware» more  CAV 1990»
13 years 10 months ago
Formal Verification of Digital Circuits Using Symbolic Ternary System Models
Ternary system modeling involves extending the traditional set of binary values
Randal E. Bryant, Carl-Johan H. Seger
FDL
2003
IEEE
13 years 11 months ago
Synchronization of analogue and digital solvers in mixed-signal simulation on a SystemC platform
This contribution proposes a synchronization technique for solvers able to handle analogue extensions to SystemC, for modelling of general, mixed-mode systems with digital and non...
Tom J. Kazmierski, Hessa Al-Junaid