26 search results - page 2 / 6 » Passive model order reduction of multiport distributed inter... |
ICCAD
2007
IEEE
14 years 3 months ago
2007
IEEE
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
DAC
1997
ACM
13 years 10 months ago
1997
ACM
CAD tools and research in the area of reduced-order modeling of largelinearinterconnect networkshaveevolved from merely finding a Pad´e approximation for the given network trans...
ISQED
2006
IEEE
14 years 9 days ago
2006
IEEE
— In this paper, we propose an efficient model order reduction (MOR) algorithm, called MTermMOR, for modeling interconnect circuits with large number of external ports. The prop...
ISQED
2007
IEEE
14 years 17 days ago
2007
IEEE
Model order reduction plays a key role in determining VLSI system performance and the optimization of interconnects. In this paper, we develop an accurate and provably passive met...
ASPDAC
2007
ACM
13 years 10 months ago
2007
ACM
As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these sy...