8 search results - page 1 / 2 » Performance Predictions for Speculative, Synchronous, VLSI L... |
ANSS
2001
IEEE
13 years 8 months ago
2001
IEEE
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
It is likely that it will become increasingly difficult to manufacture the complex, heterogeneous logic structures that characterise current reconfigurable logic systems. As a res...
ISCAPDCS
2003
13 years 6 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...