108 search results - page 4 / 22 » Performance and Power Impact of Issue-width in Chip-Multipro... |
IEEEPACT
2008
IEEE
14 years 5 days ago
2008
IEEE
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
IEEEPACT
2008
IEEE
14 years 5 days ago
2008
IEEE
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
ICCD
2007
IEEE
13 years 9 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
IEEEPACT
2009
IEEE
13 years 3 months ago
2009
IEEE
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
ISCA
2008
IEEE
14 years 5 days ago
2008
IEEE
There is still much performance to be gained by out-of-order processors with wider issue widths. However, traditional methods of increasing issue width do not scale; that is, they...