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GLVLSI
1996
IEEE
125views VLSI» more  GLVLSI 1996»
13 years 10 months ago
Performance-Driven Interconnect Global Routing
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
Dongsheng Wang, Ernest S. Kuh
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
13 years 10 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
DAC
1998
ACM
14 years 6 months ago
Performance Driven Multi-Layer General Area Routing for PCB/MCM Designs
In this paper we present a new global router appropriate for Multichip Module MCM and dense Printed Circuit Board PCB design, which utilizes a hybrid of the classical rip-up and r...
Jason Cong, Patrick H. Madden
ICCD
2001
IEEE
92views Hardware» more  ICCD 2001»
14 years 2 months ago
Performance Driven Global Routing Through Gradual Refinement
Jiang Hu, Sachin S. Sapatnekar
DAC
1995
ACM
13 years 9 months ago
Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs
A new approa ch for pe r f or ma nc e -dr ive n r outi ng i n hi ghly c onge st e d hi gh s pe e d MCMs a nd PCBs i s pr e s e nt e d. Gl oba l r out i ng i s e mpl oye d t o ma n...
Sharad Mehrotra, Paul D. Franzon, Michael Steer