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FPL
1997
Springer
123views Hardware» more  FPL 1997»
13 years 10 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
FCCM
2005
IEEE
111views VLSI» more  FCCM 2005»
13 years 11 months ago
A High-Performance Asynchronous FPGA: Test Results
We report test results from a prototype asynchronous FPGA (AFPGA) implemented in TSMC’s 0.18μm CMOS process. The AFPGA uses SRAM-based configuration bits with pipelined logic ...
David Fang, John Teifel, Rajit Manohar
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
13 years 11 months ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
IOLTS
2007
IEEE
110views Hardware» more  IOLTS 2007»
14 years 8 days ago
An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding
In this paper we present an efficient design technique for implementing the Elliptic Curve Cryptographic (ECC) Scheme in FPGAs. Our technique is based on a novel and efficient i...
Osama Al-Khaleel, Christos A. Papachristou, Franci...
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
13 years 11 months ago
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
François-Xavier Standaert, Siddika Berna &O...