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ISLPED
2007
ACM
79views Hardware» more  ISLPED 2007»
13 years 6 months ago
Post-placement leakage optimization for partially dynamically reconfigurable FPGAs
Chi-Feng Li, Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen...
IPPS
2006
IEEE
13 years 11 months ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...
CODES
2009
IEEE
13 years 8 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
CODES
2010
IEEE
13 years 1 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...