7 search results - page 2 / 2 » Power and slew-aware clock network design for through-silico... |
DATE
2009
IEEE
14 years 2 days ago
2009
IEEE
— Heat removal and power delivery are two major reliability concerns in the 3D stacked IC technology. Liquid cooling based on micro-fluidic channels is proposed as a viable solu...
SLIP
2009
ACM
13 years 11 months ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...