7 search results - page 1 / 2 » Power efficient DSP datapath configuration methodology for F... |
FPL
2008
Springer
13 years 6 months ago
2008
Springer
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
FPGA
2004
ACM
13 years 10 months ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
SLIP
2009
ACM
13 years 11 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
FCCM
1999
IEEE
13 years 9 months ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...