18 search results - page 1 / 4 » Power estimation starategies for a low-power security proces... |
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
ICIP
1999
IEEE
13 years 10 months ago
1999
IEEE
ISVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
CASES
2004
ACM
13 years 11 months ago
2004
ACM
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
ISCAS
2008
IEEE
14 years 2 days ago
2008
IEEE
— It is well known that significant power savings can be obtained by disabling or shutting down parts of a circuit during idle periods. One method is to use a high level partiti...