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DAC
2005
ACM
14 years 6 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
ISLPED
1999
ACM
143views Hardware» more  ISLPED 1999»
13 years 10 months ago
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
Kanad Ghose, Milind B. Kamble
DAC
2002
ACM
14 years 6 months ago
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor
This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput ...
Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
13 years 7 months ago
Low-power techniques for network security processors
Abstract— In this paper, we present several techniques for lowpower design, including a descriptor-based low-power scheduling algorithm, design of dynamic voltage generator, and ...
Yi-Ping You, Chun-Yen Tseng, Yu-Hui Huang, Po-Chiu...
ICCD
2000
IEEE
124views Hardware» more  ICCD 2000»
14 years 2 months ago
Processors for Mobile Applications
: Mobile processors form a large and very fast growing segment of semiconductor market. Although they are used in a great variety of embedded systems such as personal digital organ...
Farinaz Koushanfar, Miodrag Potkonjak, Vandana Pra...