21 search results - page 2 / 5 » Practical Design of Globally-Asynchronous Locally-Synchronou... |
ISCA
2002
IEEE
13 years 9 months ago
2002
IEEE
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
ISVLSI
2008
IEEE
13 years 11 months ago
2008
IEEE
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
DFT
2006
IEEE
13 years 8 months ago
2006
IEEE
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
CAV
2009
Springer
13 years 11 months ago
2009
Springer
Systems and Networks on Chips (NoCs) are a prime design focus of many hardware manufacturers. In addition to functional verification, which is a difficult necessity, the chip desi...
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...