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DAC
2005
ACM
14 years 6 months ago
Robust gate sizing by geometric programming
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, ...
FASE
2006
Springer
13 years 9 months ago
Argus: Online Statistical Bug Detection
Statistical debugging is a powerful technique for identifying bugs that do not violate programming rules or program invariants. Previously known statistical debugging techniques ar...
Long Fei, Kyungwoo Lee, Fei Li, Samuel P. Midkiff
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
13 years 11 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
CF
2010
ACM
13 years 8 months ago
Hybrid parallel programming with MPI and unified parallel C
The Message Passing Interface (MPI) is one of the most widely used programming models for parallel computing. However, the amount of memory available to an MPI process is limited ...
James Dinan, Pavan Balaji, Ewing L. Lusk, P. Saday...