Sciweavers

122 search results - page 3 / 25
» Process variability-aware transient fault modeling and analy...
Sort
View
ICSE
2003
IEEE-ACM
13 years 11 months ago
An Analysis of the Fault Correction Process in a Large-Scale SDL Production Model
Improvements in the software development process depend on our ability to collect and analyze data drawn from various phases of the development life cycle. Our design metrics rese...
Dolores M. Zage, Wayne M. Zage
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
13 years 9 months ago
Analysis and optimization of fault-tolerant embedded systems with hardened processors
1 In this paper we propose an approach to the design optimization of fault-tolerant hard real-time embedded systems, which combines hardware and software fault tolerance techniques...
Viacheslav Izosimov, Ilia Polian, Paul Pop, Petru ...
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
14 years 2 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...
AHS
2006
IEEE
113views Hardware» more  AHS 2006»
13 years 9 months ago
A Honeycomb Development Architecture for Robust Fault-Tolerant Design
A new hardware developmental model that shows strong robust transient fault-tolerant abilities and is motivated by embryonic development and a honeycomb structure is presented. Ca...
Andy M. Tyrrell, Hong Sun
ECRTS
2004
IEEE
13 years 9 months ago
Comparing Real-Time Communication Under Electromagnetic Interference
The contribution of this paper is threefold. First, an improvement to a previously published paper on the timing analysis of Controller Area Network (CAN) in the presence of trans...
Ian Broster, Alan Burns, Guillermo Rodrígue...