37 search results - page 4 / 8 » Pseudo-Circuit: Accelerating Communication for On-Chip Inter... |
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
We present a design of a customized crossbar scheduler for on-chip networks. The proposed scheduler arbitrates on-demand interconnects, where physical topologies are identical to ...
GLOBECOM
2009
IEEE
13 years 9 months ago
2009
IEEE
Abstract--This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for w...
ISCA
2006
IEEE
13 years 5 months ago
2006
IEEE
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
ICCAD
2000
IEEE
13 years 10 months ago
2000
IEEE
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
ASAP
2005
IEEE
13 years 11 months ago
2005
IEEE
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...