102 search results - page 4 / 21 » Pseudo-Exhaustive Testing of Sequential Circuits |
JAIR
2010
13 years 4 months ago
2010
Model-based diagnostic reasoning often leads to a large number of diagnostic hypotheses. The set of diagnoses can be reduced by taking into account extra observations (passive mon...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
This paper presents a new method of selecting scan
ipops (FFs) in partial scan designs of sequential circuits. Scan FFs are chosen so that the whole circuit can be partitioned in...
DFT
2007
IEEE
14 years 18 days ago
2007
IEEE
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
ATS
1998
IEEE
13 years 10 months ago
1998
IEEE
We propose a new static test set compaction method based on a careful examination of attributes of fault coverage curves. Our method is based on two key ideas: 1 fault-list and te...
FPGA
1997
ACM
13 years 10 months ago
1997
ACM
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...