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» Quality considerations in delay fault testing
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ICSE
2009
IEEE-ACM
14 years 16 days ago
Improving quality, one process change at a time
We report on one organization's experience making process changes in a suite of projects. The changes were motivated by clients’ requests for better time estimates, better ...
Caryna Pinheiro, Frank Maurer, Jonathan Sillito
ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
14 years 2 months ago
Statistical path selection for at-speed test
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chan...
SEDE
2007
13 years 7 months ago
Case study: A tool centric approach for fault avoidance in microchip designs
— Achieving reliability in fault tolerant systems requires both avoidance and redundancy. This study focuses on avoidance as it pertains to the design of microchips. The lifecycl...
Clemente Izurieta
ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
14 years 1 days ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
CSMR
2003
IEEE
13 years 11 months ago
Using Observation and Refinement to Improve Distributed Systems Test
Testing a distributed system is difficult. Good testing depends on both skill and understanding the system under test. We have developed a method to observe the system at the CORB...
Johan Moe, David A. Carr, Mikael Patel