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» Quantized message passing for LDPC codes
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DATE
2009
IEEE
144views Hardware» more  DATE 2009»
13 years 11 months ago
Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing
—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...
Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Ake...
GLOBECOM
2008
IEEE
13 years 11 months ago
Noise Thresholds for Discrete LDPC Decoding Mappings
— For decoding low-density parity-check (LDPC) codes on discrete memoryless channels, a method to quantize messages and to find message-passing decoding functions for the variab...
Brian M. Kurkoski, Kazuhiko Yamaguchi, Kingo Kobay...
VLSISP
2010
140views more  VLSISP 2010»
13 years 3 months ago
A Split-Decoding Message Passing Algorithm for Low Density Parity Check Decoders
A Split decoding algorithm is proposed which divides each row of the parity check matrix into two or multiple nearly-independent simplified partitions. The proposed method signific...
Tinoosh Mohsenin, Bevan M. Baas
ICC
2007
IEEE
147views Communications» more  ICC 2007»
13 years 11 months ago
VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax
— We present a new multi-rate architecture for decoding irregular LDPC codes in IEEE 802.16e WiMax standard. The proposed architecture utilizes the value–reuse property of offs...
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Moha...
WCNC
2008
IEEE
13 years 11 months ago
Decoding on Graphs: LDPC-Coded MISO Systems and Belief Propagation
— This paper proposes a new approach for decoding LDPC codes over MISO channels. Since in an nT × 1 MISO system with a modulation of alphabet size 2M, nT transmitted symbols are...
Amir H. Djahanshahi, Paul H. Siegel, Laurence B. M...